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CD4515BM - 4-Bit Latched/4-to-16 Line Decoders

Description

The CD4514B and CD4515B are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors These circuits are primarily used in decoding applications where low power dissipation and or high noise immunity is

Features

  • Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility Low quiescent power dissipation 3 0V to 15V 0 45 VDD (typ ) fan out of 2 driving 74L 0 025 mW package 5 0 VDC Y Y Y Single supply operation Input impedance e 1012X typically Plug-in replacement for MC14514 MC14515 Logic and Connection Diagrams TL F 5994.
  • 1 Dual-In-Line Package Order Number CD4514B or CD4515B TL F 5994.
  • 2 Top View TRI-STATE is a registered trademark of National Semicondu.

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CD4514BM CD4514BC CD4515BM CD4515BC 4-Bit Latched 4-to-16 Line Decoders February 1988 CD4514BM CD4514BC CD4515BM CD4515BC 4-Bit Latched 4-to-16 Line Decoders General Description The CD4514B and CD4515B are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors These circuits are primarily used in decoding applications where low power dissipation and or high noise immunity is required The CD4514B (output active high option) presents a logical ‘‘1’’ at the selected output whereas the CD4515B presents a logical ‘‘0’’ at the selected output The input latches are R – S type flip-flops which hold the last input data presented prior to the strobe transition from ‘‘1’’ to ‘‘0’’ This input data is
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